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• #2748 HookR addikt S_x96x_S #2743

  Új Válasz 2020-02-21 19:58:58 #2748

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  HookR

  addikt

  válasz S_x96x_S #2743 üzenetére

  A második linkeden van egy érdekes, látókör szélesítő komment, remélem nem gond, ha bemásolom:
  
  olliej: "I still don’t understand what it is about avx2 that results in these kinds of issues - is it really just a matter of increased number of execution units running at once causing weird power and heat issues?"
  
  paulmd: "Not increased number of execution units, but increased number of transistors, yeah.
  A normal multiply does 1 number at a time (32 bit for simplicity). AVX2 can do up to 8 multiplications at a time. That's a huge amount more transistors firing all at once and that causes the voltage to start to droop.
  AVX-512 takes that even further and now it's 16 multiplications per unit, oh and Intel moved from 1x256-bit unit per core on Haswell/Broadwell to 2x512-bit units on Skylake-X, so it's potentially 32 multiplications at a time.
  Basically to prep for that much power being drawn all at once, the chip has to wind everything else down and switch to a higher-voltage mode to account for the voltage droop caused by all those transistors switching at once in one place.
  At this level behavior is intensively analog and thermals/voltage both significantly affect transistor current draw and switching time, which feeds back into heat and power consumption.
  This gets even more problematic on 7nm/10nm type nodes and especially in GPUs where you are doing a huge amount of vector arithmetic all the time. Essentially it is no longer possible to design processors that are 100% stable under all potential execution conditions, or even under normal operating conditions, so you have to have power watchdog circuitry that realizes when it's getting close to brownout/missing its timing conditions and slows itself down to stay stable. That's why AMD introduced clock stretching in a big way with Zen2 (despite the fact that it's nominally been around since Steamroller). NVIDIA piloted this with Pascal, AMD piloted it with Vega and brought it to CPU with Zen2. You simply cannot design the processor to be 100% stable at competitive clocks anymore. You have to have power management that's smart enough to withstand small transient power conditioning faults.
  https://semiengineering.com/managing-voltage-drop-at-107nm/
  https://semiengineering.com/power-delivery-affecting-performance-at-7nm/ "

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